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<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Eric X. Liu's Personal Page</title><link>/</link><description>Recent content on Eric X. Liu's Personal Page</description><generator>Hugo</generator><language>en</language><lastBuildDate>Thu, 02 Oct 2025 08:42:39 +0000</lastBuildDate><atom:link href="/index.xml" rel="self" type="application/rss+xml"/><item><title>Flashing Jetson Orin Nano in Virtualized Environments</title><link>/posts/flashing-jetson-orin-nano-in-virtualized-environments/</link><pubDate>Thu, 02 Oct 2025 00:00:00 +0000</pubDate><guid>/posts/flashing-jetson-orin-nano-in-virtualized-environments/</guid><description>&lt;h1 id="flashing-jetson-orin-nano-in-virtualized-environments"&gt;
<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom"><channel><title>Eric X. Liu's Personal Page</title><link>/</link><description>Recent content on Eric X. Liu's Personal Page</description><generator>Hugo</generator><language>en</language><lastBuildDate>Sat, 04 Oct 2025 05:52:46 +0000</lastBuildDate><atom:link href="/index.xml" rel="self" type="application/rss+xml"/><item><title>Why Your Jetson Orin Nano's 40 TOPS Goes Unused (And What That Means for Edge AI)</title><link>/posts/benchmarking-llms-on-jetson-orin-nano/</link><pubDate>Sat, 04 Oct 2025 00:00:00 +0000</pubDate><guid>/posts/benchmarking-llms-on-jetson-orin-nano/</guid><description>&lt;h2 id="introduction"&gt;
Introduction
&lt;a class="heading-link" href="#introduction"&gt;
&lt;i class="fa-solid fa-link" aria-hidden="true" title="Link to heading"&gt;&lt;/i&gt;
&lt;span class="sr-only"&gt;Link to heading&lt;/span&gt;
&lt;/a&gt;
&lt;/h2&gt;
&lt;p&gt;NVIDIA&amp;rsquo;s Jetson Orin Nano promises impressive specs: 1024 CUDA cores, 32 Tensor Cores, and 40 TOPS of INT8 compute performance packed into a compact, power-efficient edge device. On paper, it looks like a capable platform for running Large Language Models locally. But there&amp;rsquo;s a catch—one that reveals a fundamental tension in modern edge AI hardware design.&lt;/p&gt;
&lt;p&gt;After running 66 inference tests across seven different language models ranging from 0.5B to 5.4B parameters, I discovered something counterintuitive: the device&amp;rsquo;s computational muscle sits largely idle during LLM inference. The bottleneck isn&amp;rsquo;t computation—it&amp;rsquo;s memory bandwidth. This isn&amp;rsquo;t just a quirk of one device; it&amp;rsquo;s a reality that affects how we should think about deploying LLMs at the edge.&lt;/p&gt;</description></item><item><title>Flashing Jetson Orin Nano in Virtualized Environments</title><link>/posts/flashing-jetson-orin-nano-in-virtualized-environments/</link><pubDate>Thu, 02 Oct 2025 00:00:00 +0000</pubDate><guid>/posts/flashing-jetson-orin-nano-in-virtualized-environments/</guid><description>&lt;h1 id="flashing-jetson-orin-nano-in-virtualized-environments"&gt;
Flashing Jetson Orin Nano in Virtualized Environments
&lt;a class="heading-link" href="#flashing-jetson-orin-nano-in-virtualized-environments"&gt;
&lt;i class="fa-solid fa-link" aria-hidden="true" title="Link to heading"&gt;&lt;/i&gt;