# vAttention

December 8, 2025 4-minute read

Large Language Model (LLM) inference is memory-bound, primarily due to the Key-Value (KV) cache—a store of intermediate state that grows linearly with sequence length. Efficient management of this memory is critical for throughput. While PagedAttention (popularized by vLLM) became the industry standard by solving memory fragmentation via software, recent research suggests that leveraging the GPU’s native hardware Memory Management Unit (MMU) offers a more performant and portable solution.

#### The Status Quo: PagedAttention and Software Tables Link to heading

Prior to PagedAttention, systems allocated contiguous memory for the maximum possible context length, leading to severe fragmentation and wasted memory. PagedAttention addressed this by chunking the KV cache into non-contiguous blocks, managed by a software-defined “page table” (the Block Table) [1].

While effective at reducing fragmentation, this approach introduces significant complexity:

- Kernel Rewriting: Because the KV cache is no longer contiguous in virtual memory, standard attention kernels (like cuDNN SDPA or vanilla FlashAttention) cannot be used directly. Developers must rewrite kernels to manually dereference block tables [1].
- Software Overhead: The system must manage virtual-to-physical mapping in user space, duplicating work typically handled by the OS. This adds runtime overhead to the critical path of both the CPU (managing tables) and the GPU (performing lookups) [1].
- Performance Penalties: PagedAttention-based kernels have been observed to be slower than their non-paged counterparts. For example, vLLM’s paged kernel has shown to be up to 2.8x slower than FlashAttention-2 in specific tests [1].

#### The Hardware-Native Alternative: vAttention Link to heading

vAttention proposes returning the responsibility of memory management to the OS and hardware. By utilizing the CUDA Virtual Memory Management (VMM) APIs, it is possible to decouple the allocation of virtual memory from physical memory [1].

How it works:

1. Virtual Contiguity: The system reserves a large, contiguous range of virtual addresses for the KV cache at request start.
2. Physical Paging: Physical memory pages are allocated and mapped to this virtual range only on demand (dynamically) as the token sequence grows [1].
3. Hardware Lookups: Because the GPU sees a contiguous virtual address range, the hardware Translation Lookaside Buffer (TLB) handles the address translation. This allows the use of unmodified, high-performance kernels like FlashAttention-2 or FlashAttention-3 without custom paging logic [1].

#### Technical Challenges and Solutions Link to heading

Historically, using the GPU native virtual memory for high-frequency token generation faced two major bottlenecks: Control Plane Latency and Page Granularity.

1. Control Plane Latency (The API Bottleneck) Standard memory allocation (`cudaMalloc`) is monolithic—it allocates virtual and physical memory simultaneously. The more granular driver API, `cuMemMap`, allows separating these steps but involves expensive round-trips to the OS driver. Invoking these APIs synchronously during decoding (which generates one token at a time) would stall the GPU execution pipeline [1].

To solve this, vAttention utilizes execution overlap:

- Because LLM decoding is autoregressive and predictable, the system knows exactly when new memory is needed (one token ahead).
- The CPU initiates the memory mapping for the next token asynchronously while the GPU is still computing the current token. By the time the GPU reaches the next step, the TLB and page tables are already updated, effectively hiding the driver latency [1].

2. Page Size Granularity (The Fragmentation Bottleneck) The GPU TLB hierarchy is sensitive to page sizes.

- 4KB Pages: Too small. Mapping gigabytes of KV cache with 4KB pages causes “TLB thrashing,” degrading performance.
- 2MB Huge Pages: The standard for CUDA large allocations. However, allocating 2MB for a single token update causes massive internal fragmentation, negating the benefits of dynamic allocation.

Research identified 64KB as the optimal page size, offering a balance between TLB efficiency and memory utilization. While standard CUDA APIs default to 2MB, vAttention utilizes modified driver calls to enable 64KB pages, eliminating TLB thrashing without incurring the fragmentation cost of huge pages [1].

#### Performance and Portability Implications Link to heading

Moving memory management from software (PagedAttention) to hardware (vAttention) yields measurable benefits:

- Throughput: In prefill-heavy workloads, vAttention outperforms PagedAttention-based systems (like vLLM and FlashInfer) by up to 1.23x due to the elimination of software lookup overheads. In decoding, it matches or exceeds the performance of optimized paged kernels [1].
- Portability: A significant advantage is software compatibility. When NVIDIA released FlashAttention-3 (optimized for Hopper H100 GPUs), it did not initially support PagedAttention. vAttention enabled the immediate use of FlashAttention-3 with dynamic memory support, achieving up to 1.5x higher throughput than PagedAttention-based FlashAttention-2 [1].

#### Conclusion Link to heading

While PagedAttention solved the critical issue of memory fragmentation in LLMs, it necessitated a complex software abstraction layer. By leveraging low-level CUDA VMM APIs, handling allocations asynchronously to hide driver latency, and optimizing page sizes, it is possible to achieve dynamic memory management using the GPU’s native hardware. This restores the illusion of contiguous memory, simplifies kernel development, and improves inference performance.

### References Link to heading

[1] R. Prabhu et al., “vAttention: Dynamic Memory Management for Serving LLMs without PagedAttention,” in Proceedings of the 30th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS ‘25), 2025.